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Job Description:

RD on algorithms related to computer vision and deep learning;

Support RTL implementation;


MS in Computer Science, Electrical, or Applied Mathematics;

Experience in computer vision, deep learning and optimization methods;

Familiar with basic algorithms on objective detection, recognition, tracking, etc.;

At least familiar with one deep learning framework;

Excellent programming expertise (python, matlab and c/c++) required;

Self-motivated, good team work spirit and good communication skills;

Familiar with Cuda/opencv is a plus.

HR Contact:

Job Description:

Participate ASIC digital verification for various PCIe IP/SoC projects;

Create PCIe verification plans with designers;

Develop DV architecture and verification environment;

Do verification execution and sign-off.


Excellent team working style;

Production experiences on PCIe Gen 3 products;

Solid IP/SoC verification background:

Mass production for verified IP/SoC;

Bachelor with 7+ years of working experiences in ASIC digital verification (Master with 5+ years);

Expert on SystemVerilog/UVM;

Expert on scripting;

Good English skills (read and write);

Skills plus:

Production experience in simulation acceleration solution;Production experience in in-circuit emulation solution;Familiar with x86 architecture;Good understanding on modern operating systems and virtualization for PCIe.
HR Contact:

Job Description:

Write micro-architecture definition and design implementation Spec;

Write RTL coding for block or top level;

Do IP level synthesis/timing analysis/formality check/CDC check/Code coverage check;

Assist verification engineers to complete module and top level simulation and verification;

Debug RTL/Gate Level waveform at module or top level;

Do Silicon debugging of the related module functionalities and provide ECO solution accordingly.


MSEE with 5-6 years of experience in digital design;

Relevant experience in high speed IO IP design, and PCIe design experience is a big plus;

Very strong skills in Verilog RTL coding, simulation debug and base or metal layer ECO;

Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc.;

Strong skills in Script and be familiar with TCL, Perl, etc.;

Self-motivated, good team work spirit and good communication skills.

HR Contact:

Job Description:

Development of next generation solutions for advanced memory interfaces of data centers;

High speed SI simulation and analysis;

Extraction of channel model using standard industry tools;

Lab measurements of interconnect channel in frequency and time domains.


MS in Electrical Engineering/Microwave/Physics/Computer Science/Math;

Knowledge of Electromagnetic and Microwave concepts;

Knowledge of a programming or scripting language in a Windows/UNIX environment;

Strong analytical and problem-solving skills;

Passion for technology;

Eager, quick learner with strong team-work spirit;

Excellent technical communication skills.

HR Contact:

Job Description:

Work with the IC design engineers and application engineers to determine requirements for device post-silicon validation in lab;

Develop and execute validation test plans, design test boards, and write automation test scripts;

High-frequency mixed-signal circuit validation: IO, PLL, regulators;

Test data analysis with C/Python/Matlab.


BS/MS with 3+ years of experience in Analog/Mixed-Signal test;

Experience in C/Python/Matlab programming;

Excellent understanding of test instruments such as oscilloscope, BERT, etc.

HR Contact:

Job Description:

Design, simulate and verify high speed CMOS analog and mixed-signal circuits;

Conduct high speed serial link system behavioral modeling;

Supervise layout floor plan and design of IC blocks;

Help define specifications of IC blocks and create design documentation;

Do silicon test, characterization and debugging.

Make knowledge sharing/presentation within design team.


MSEE or above with minimum 3 years of working experience;

Strong experience in DFE (Decision Feedback Equalizer) or CDR (Clock Data Recovery) circuit design;

Experience in DDR or other high speed designs (e.g. PCIe, HDMI, SerDes) is preferred;

Good system level knowledge on high speed serial link;

Strong lab experience in silicon debugging, good understanding on lab instruments (e.g. oscilloscope, network analyzer);

Ability to supervise layout floor plan and design;

Good understanding on deep submicron CMOS technology process and device physics;

Proficiency of EDA design tools (Virtuoso, Spectre, HSPICE, AMS, etc.);

Experiences in Verilog, Verilog-A and/or Matlab;

Good communication skill and good command of written English are highly desired.

HR Contact:

Job Description:

We are looking for an experienced Switch Power IC design engineer to develop a high efficiency Buck PMIC for next generation DDR application. The Job includes but not limits to below items:Buck behavior model building up, key parameters simulation, fine tune and verification; Defining specifications of blocks and creating design documentation; All function block circuit level design, simulation and verification; Supervision of layout floor plan and design of each function blocks; Silicon evaluation test, characterization and debugging; Production test development support.


BSEE or above with at least 2 years of experience in switch power IC development;

Experience in switch power supply behavior model building up;

Experience in Buck power IC circuit design;

Ability to supervise layout floor plan and design;

Good understanding of BCD process, model for switch power supply IC design;

Proficiency in EDA design tools (Simplis, Spectre, HSPICE, etc.);

Good Lab experience in switch power IC testing;

Good verbal and written communication and presentation skills, positive attitude;

Willing to take challenges and to solve difficult technical problems;

Quick learner.

HR Contact:

Job Description:

Conduct ASIC prototyping for high-speed circuit design, including RTL coding, simulation, and implementation;

Design FPGA test platforms, co-working with schematic and layout teams


BSEE/MSEE with 1+ years of expierence in FPGA prototyping;

Expert in Xilinx Vivado FPGA design flow (block design and non-project flow) ;

Expert in board level debugging;

Expert in lab equipment, such as oscilloscope, etc;

Expert in scripting (python/ tcl) ;

Solid project experience in high speed timing closure (logic > 250MHz, IO > 500MHz);

Deep knowledge in PCIe is a big plus;

Knowledge in modern operation system is a plus;

HR Contact:

Job Description:

Participate ASIC digital verification for various IP/SoC projects;

Create verification plans with designers;

Develop DV architecture and verification environment;

Verification execution and sign-off.


Excellent team work style;

Solid IP/SoC verification background;

Mass production for verified IP/SoC;

Bachelor with minimum 2 years of working experience in ASIC digital verification;

Production experience in verification strategies and test plans;

Familiar with System Verilog/UVM for test bench creation, debug, reuse, constrained-random stimulus and functional coverage;

Production experience in ARM buses, such as AXI/AMBA/APB;

Familiar with verification tools;

Familiar with Linux, csh/Python or other script languages;

Good English reading and writing skills.

HR Contact:

Job Description:

Play a critical role in meeting corporate goals with your experience to develop ATE test hardware & software to support IC design center;

Develop/convert/migrate hardware & software between test systems to increase test coverage and production throughput;

study device specification and use simulation tool to generate test vectors based on device behavior model;

Enhance the existing test techniques for maximum test quality to minimize customer returns and to reduce test time;

Customize existing test hardware to PCBs for test repeatability, cost effectiveness, maintenance and productive debugging;

Procure essential instruments to continuously upgrade test engineering lab for bench-to-tester correlation;

Develop software tools to reduce test program development cycle time by automating generation of test programs from libraries of proven test methods;

Setup/transfer new products and technology for production off-load at off-shore.


Knowledge of ATE testing is essential;

Familiar with Verilog and experience in functional simulation with EDA tool for test vector generation;

Working experience in fast pace semi-conductor manufacturing environment;

Good sense of responsibility and positive working attitude;

Willing to travel at short notice;

BSEE/MSEE in Electronics/Electrical Engineering;

Minimum 2 to 5 years of working experience in semiconductor industry;

Experience in mixed signals and RF testing is preferred;

Good written and oral communication skills;

Knowledgeable of Credence Duo/Teradyne J750, A5 or Catalyst/Agilent AG9300 ATE systems;

Able to understand, debug, modify and improve test programs;

Able to manage sub-contractors at different locations;

Circuit Design (IC) background will be taken as an additional qualification.

HR Contact:

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